Low-Voltage,
Low-Power VLSI Subsystems
by Kiat-Seng Yeo
and Kaushik Roy

Detailing the latest techniques in low-voltage VLSI design, Low-Voltage, Low-Power VLSI Subsystems is a focused tutorial providing immediate access to state-of-the-art, proven design techniques in CMOS, BiCMOS, and other in-demand applications.

In this unique resource, Professors Yeo and Roy offer electronic and IC designers as well as students:

• New approaches to the challenges of silicon-level design for low-power circuitry pacing electronics and ICs
• Low-power solutions for adders, multipliers, ROMs, SRAMs, DRAMs and signal processors
• Expert performance comparisons and contrasts of low-power options
• Reduced-complexity design solutions
• Optimization and implementation techniques indispensable in modern VLSI/ULSI subsystem design
• Useful charts, illustrations, and applied algorithms
• Clear presentations of complex topics
• Real-life examples clarifying key concepts

Low-Voltage, Low-Power VLSI Subsystems is an invaluable reference and practical guide to the latest in optimized VLSI/ULSI subsystem design.

Contents

1. Low-Power CMOS VLSI Design
2. Circuit Techniques for Low-Power Design
3. Low-Voltage Low-Power Adders
4. Low-Voltage Low-Power Multipliers
5. Low-Voltage Low-Power Read-Only Memories
6. Low-Voltage Low-Power Static Random-Access Memories
7. Low-Voltage Low-Power Dynamic Random-Access Memories
8. Large Low-Power VLSI System Design and Applications

Index

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